started 2016-03-09

    Fabrication of new wafer BPC9
    High Z design

    lift-off process on 1st step
    Batch 3481, Si  <100>, intrinsic, rho > 20kohm.cm, 300µmModifier la section

    Litho 1st stepModifier la section
    mercredi 09/03Modifier la section
    • spin

    spun with cleaned pipette. Tiny spots but not so much.

    bake wafer >10' @ 110°C (solvent evaporation)
    spin AZ5214E (Aurelie bottle, per 12/2014) 60" @ 4krpm
    bake 1' @ 110°C
    Expo 20mJ/cm2 @ 365nm, Vacuum contact -> 2" @ 10mW
    bake 2'40 @ 120°C
    Flood expo 40"
    Dev MIF726 1'15 @ 21.2°C, rinse ODI 60" beaker + 30" water tap
    
    • Residue removal
    2' ozone plasma @ 100W, 200µb
    

    TODOModifier la section

    • multilayer evaporation (old plassys)
    P_init = 1.4e-7mb, N2 trap -> 1.1e-7mb
    - Al 150nm @ 1nm/s, P_ev ~ 2.5e-7mb, 100nm @ +7° / 51nm @ 0°
    - Ti 10nm @ 0.5nm/s -> P_ev = 3.0e-7mb (hot) -> 3.5e-8mb (cold)
    - Pd 4nm @ 0.2nm/s -> P_ev = 6e-8mb 
    /!\ Loadlock pressure always very high!!!
    • Lift-off
    remover PG 70°C, 30'
    

    Fabrication of new wafer BPCT9Modifier la section

    In parallel with BPC9, to do the exact same steps in advance
    Take wafer lot 2451, DSP

    Litho 1st step
    mercredi 09/03Modifier la section

     

    bake wafer 5' @ 110°C (solvent evaporation)
    spin AZ5214E (Aurelie bottle, per 12/2014) 60" @ 4krpm
    bake 1' @ 110°C
    Expo 20mJ/cm2 @ 365nm, Vacuum contact -> 2" @ 10mW
    bake 2'40 @ 120°C
    Flood expo 40"
    Dev MIF726 1'15 @ 21.2°C, rinse ODI 60" beaker + 30" water tap
    • Residue removal
    2' ozone plasma @ 100W, 200µb
    
    • multilayer evaporation (old plassys)
    P_init = e-7mb, N2 trap -> e-7mb, Ti pump -> 
    - Al 130nm @ 1nm/s, P_ev ~ e-7mb, 100nm @ +7° / 51nm @ -3°
    - Ti 20nm @ 0.5nm/s -> P_ev = e-7mb (hot), 15nm @ +7° / 5nm @ -3°
    - Au 10nm @ 0.5nm/s -> P_ev = e-8mb, all at 0°
    /!\ Loadlock pressure always very high!!! Maybe the gauge doesn't work anymore
    It could be that there is a H2O leak on the crucible of Ti, to be confirmed
    
    • Lift-off
    remover PG 70°C, 30'
    

    Litho 2nd stepModifier la section

    BCB bottle refilled on 07/03
    thickness was 4640nm on center, 4600nm on the edge.
    Now is 4580nm

    • BCB spin
    bake wafer >10' @ 110°C 
    spin AP3000 - 5" @ 500rpm acc 200rpm/s; 60" @ 6000rpm ; bake 1' @ 110°C
    spin BCB4024-40 - 5" @ 500rpm acc 250rpm/s; 60" @ 5000rpm acc 1500rpm ; bake 3'30 @90°C
    
    • expose
    Expo 70mJ/cm2 @ 365nm, Vacuum contact -> 7" @ 10mW/cm2
    
    • develop
    pre-dev bake 30" @ 65°C
    dev DS3000 at 31-32°C (very important) for 8 min
    rinse DS3000 1' @ 20°C 
    rinse ODI 1' water tap
    

    NB: made a unexposed test wafer for the development time: 4' when interferences finish (instead of 2'30 when out of the fridge)
    Still, the patterns are much wider than they should, we see residues at the bottom, and yet it is clearly overdevelopped!!! (because patterns at 7min or BPCT8 that was made at the same time are better shaped than those of BPCT9)

    WE SHOULD NOT KEEP ON USING BCB THAT WAS NOT HELD IN THE FRIDGE ... Goddam

    vendredi 11/03
    • BCB hardening bake
    Hot plate  1h @200ºC

    Obs: patterns went much smoother

    • BCB RIE cleaning
    SF6:O2 5:45, 250µb, 25W -> 70V, 35"
    

    Overal OK, but there are also very tiny spots, like the layer was attacked from place to place
    Does SF6 etches Al ??? (unprotected by Al2O3)


    lundi 14/03
    Litho 3rd step
    • spin PMGI SF15 +AZ5214

    NB: there are still a lot of tiny spots on the spun resist!!! I try to clean the pipette the best I can.

    bake the wafer 30' @ 110°C for water removal
    tape the wafer on blue clean room tape, cut to a ~3" square (half the width of blue tape)
    dispense PMGI SF15 1-1.5mL (no more!) slowly from a pipette well centered on wafer
    2" @ 300rpm acc 250rpm/s
    3" @ 800rpm acc 500rpm/s
    60" @ 1500rpm acc 500rpm/s
    bake SF15 5min at 150°C
    spin AZ5214E (Aurelie bottle, per 12/2014) 60" @ 4krpm
    bake 1'30 @ 110°C
    
    Expo 50mJ/cm2 @ 365nm, Vacuum contact -> 5" @ 9.5mW
    bake 3' @ 120°C
    Flood expo 45"
    Dev MIF726 2' + rinse ODI 60" beaker + 30" water tap
    

    Patterns are OK, but the PMGI unsticks from noble metal parts
    Hopefully, Ti/Au is sufficiently protective and Al is not etched. I decide to continue the process and put it in evaporator

    • etch + bridge evaporation (new plassys)
    P_init = 4e-8mb (pumped over night)
    - etch 500V, 65mA, 10", 16°/s planetary
    - Ti 5nm @ 0.2nm/s
    - Al 250nm @ 1nm/s -> P_ev ~ 4e-7mb 
    • Lift-off
    hot acteon 30' -> the whole layer peels off
    5" US
    rinse IPA
    remover PG 70°C, 30'
    

    Litho 4th step

    mercredi 16/03

    • spin MAA / PMMA bilayer
    - spin MAA8.5 EL10 (batch 14020103, exp. 01/2015) @ 2000rpm for 60"
    - bake hot plate setpoint 180°C, 5'
    - spin PMMA A6 (batch 15121016, exp. 1/1/2017) @ 6000rpm for 60"
    - bake hot plate setpoint 180°C, 15'
    - spin UV III (Vivien bottle) @ 4000rpm 60"
    - bake hot plate 140°C, 90"

    MAA = 530 +/- 20nm
    PMMA = 240 +/- 20nm

    reprocess once because spin was inhomogeneous.

    • dice

    Cut wafer in 2, and take 1/4 to make tests for the 4th and 5th steps, to tune the geometry, and doses of all patterns.
    Isolate a chip to measure its Tc, and a possible resonance at 300mK.
    Measured Tc in Marcelo's fridge: between 1.12 and 1.15K. As expected, seems higher than it should. (though the temperature is not calibrated in that range. cal exists from 300K to 1.5K and from 230mK to 500mK)

     

    TEST n°1:
    upper left 1/4 of the wafer
    • e-beam exposure XL30 (18/03 et 21/03), take time to setup the right procedure on wafer with alignement on each chip

    remove UV3 in IPA, 2'
    BB gold

    30keV, 300µC/cm2, 1200pC/cm, spot 1, I~ 22pA, WD=17mm, 
    field x2000 :  area step size 4nm (dwell time ~ 2.2µs), line step size 1nm  (dwell time ~5.5µs)
    dose factor on all patterns: 1.2 for chips after the first one (4Q)
    
    • development
    dev: MIBK - IPA (1:3) 1'30
    rinse: IPA - ethanol (1:1) 30"
    
    • evap (old plassys), 22/03
    etch : 5mA 500V, 20"
    Al 100nm @ 1nm/s, 0°
    
    • lift
    warm aceton (30°C): a bit longer than usual but mostly OK

    Results:
    The PMMA mask is too thick, the MAA was not well exposed so we have residues in the bottom or on the side of patterns. (even though dose was 1.2)
    On silicon, the alignement marks have well defined edges, but still residues on the bottom
    On gold, they are rounded (overdosed), but still residues on the bottom

    -> should use thinner PMMA

    Litho 5th step on test n°1

    • spin MAA / PMMA bilayer
    - spin MAA8.5 EL10 (batch 14020103, exp. 01/2015) 45" @ 2000rpm + 5" @ 8krpm acc 4k
    - bake hot plate setpoint 180°C, 5'
    - spin PMMA A6 (batch 15121016, exp. 1/1/2017) 45" @ 6000rpm + 5" @ 8krpm acc 4k
    - bake hot plate setpoint 180°C, 15'

    MAA = 580 +/- 10nm
    PMMA = 340 +/- 20nm

    NB: I did no wait for the result of step 4 to spin step 5, so I found out afterwards that I should use thinner PMMA

    • e-beam exposure XL30 (23/03): alignement marks

    BB gold

    30keV, 300µC/cm2, 1200pC/cm, spot 1, I~ 22pA, WD=17mm, 
    field x2000 :  area step size 4nm (dwell time ~ 2.2µs), line step size 1nm  (dwell time ~5.5µs)
    dose factor on all patterns: 1.1
    • development
    dev: MIBK - IPA (1:3) 1'
    rinse: IPA 30"
    • e-beam exposure XL30 (23/03): junctions
    30keV, 300µC/cm2, 1200pC/cm, spot 1, I~ 22pA, WD=17mm, 
    field x2000 :  area step size 4nm (dwell time ~ 2.2µs) patterns, step size 8nm undercut boxes
    dose factor 1.3 main patterns, 0.9 island, 0.4 undercut boxes

    Put undercut boxes on the sides of main patterns, and all around island.

    • dice all chips

    - process BPCT9_1: 4Q (2,2)

    Was this page helpful?
    Mots clés (Modifier les mots clés)
    • No tags
    Vous devez être connecté pour poster un commentaire.
    Propulsé par MindTouch Core